1. Field of the Invention
The present invention relates to an antibounce circuit for digital circuits for eliminating the value oscillations occurring in certain digital signals when switching between two states.
An example of a signal which can bounce one or more times during state switching before stabilizing at the new level occurs in a high-resolution analog comparator used to detect when a low-frequency analog signal exceeds a certain threshold. As soon as the signal exceeds the threshold by a very low preset value, equal to the sensitivity of the comparator (e.g. 500 microvolts), a transition of the logical output level of the comparator occurs. However, due to the noise possibly affecting it, the analog input signal can drop back below the threshold for a short time even more than once before rising finally above it, thus producing a digital comparator output signal affected by bounces.
2. Prior Art
In order to eliminate these bounces, antibounce circuits are known which generally wait for these oscillations to end before detecting the actual switching. This however has the disadvantage that the switching is not detected immediately, but with a delay equal to the antibounce time.
Said known antibounce circuits generally also have the disadvantage of not safely recognizing partial bounces or oscillations (i.e. bounces or oscillations which do not completely return to the signal's previous state or level), giving rise either to an even longer detection delay or to the incomplete elimination of the bounces.